The present invention relates to using redundant circuitry on integrated circuits in order to increase manufacturing yields.
Integrated circuits are manufactured on wafers, which are typically made of silicon that undergoes several processing steps. Once wafer processing is complete, the integrated circuits on the wafer are tested. This testing procedure is known as wafer sort. After wafer sort, the integrated circuits, the die, are separated from one another, and the good die, those that pass wafer sort testing, are packaged. The packaged parts are retested in a procedure referred to as final test. The packaged parts that pass final test may then be used or sold.
It is desirable to have as many good die per wafer as possible. This helps amortize the expense of a wafer among a greater number of die, thus reducing per die costs. Unfortunately, in a conventional integrated circuit, one defective or nonfunctional circuit block out of many is enough to render an entire die inoperable.
This is particularly troublesome for large integrated circuits. Errors in processing, such as opens, shorts, crystal defects, metal bridging, and other problems, tend to be exponentially proportional to die area. Thus, larger integrated circuits are more likely to have a defect than a smaller circuit. Also, since there are fewer die per wafer to start with, this higher rate of attrition has a particularly negative effect.
Accordingly, it is desirable to include some number of redundant circuit blocks on an integrated circuit. If one circuit block is defective, the integrated circuit functionality can be retained if the redundant circuit block can be substituted for the defective block. But saving the functionality of an integrated circuit does not make economic sense if the overhead or cost in terms of die area of the redundant and associated circuitry is such that the number of die per wafer is decreased significantly.
Thus, what is needed are circuits, methods, and apparatus for using redundant circuitry on integrated circuits to increase manufacturing yields, preferably without greatly increasing die area and circuit complexity.